AP

Arvinder Chadha Ph D PMP

Forward thinking solutions driven senior engineering management professional with 8+ yrs of leading both bold zero to one & complex technology products in semiconductor & display OEM industry
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Email: ****5@gmail.com
Location: Santa Clara, California, United States
Current employer: Applied Materials
Current title:
Senior Manager, Strategic Initiatives / New Business Development
Last updated: 22/05/2023 01:51 AM
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About

Arvinder Chadha Ph D PMP is from Santa Clara, California, United States. Arvinder works in the following industries: "Semiconductors". Arvinder is currently Senior Manager, Strategic Initiatives / New Business Development at Applied Materials, located in Santa Clara, California. In Arvinder's previous role as a Senior Product Engineer, Supply Chain Group at Lam Research, Arvinder worked in Fremont, California until Jan 2018. Prior to joining Lam Research, Arvinder was a Research Assistant at The University of Texas at Arlington and held the position of Research Assistant. Prior to that, Arvinder was a Research Associate at University of Colorado Boulder from Jan 2009 to Sep 2009. Arvinder started working as Research Assistant at University of Colorado Boulder in May 2007. From May 2007 to May 2008, Arvinder was Lead Teaching Assistant at University of Colorado Boulder. Prior to that, Arvinder was a Research Assistant at University of Colorado Boulder from Jan 2007 to May 2008. Arvinder started working as Teaching Assistant, at University of Colorado at Boulder in Jan 2007.

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Arvinder Chadha Ph D PMP's current jobs
Title: Senior Manager, Strategic Initiatives / New Business Development
Period: Feb 2018 - Present (6 years, 9 months)
Location: Santa Clara, California

Role: Lead pathfinding, engineering development, and program manage emerging displays projects for next gen. consumer electronics. Recipient of an Excellence Award for demonstrating creativity, foresight, resilience and mature judgement. Strategic: Transformed 3+ ideas from whiteboard drawings to products for customer validation within $1M budget to create >$1B estimated revenue; presented visualizations revealing novel insights and catalyzing stakeholder engagement Innovation: Identified high value problems from the voice of customer; conceived differentiated solutions, POCs and validated prototypes; filed 10+ patents to gain competitive advantage in manufacturing large area patterns for polarization control & light guiding, imprint replication & transparent mechanically hard thin film flexible & rigid coatings Execution: Developed project plans, milestones, identified and mitigated risks by building new infrastructure & processes; leveraged insights & data to resolve conflicts, define specs & guide process development to improve performance by >5x & decrease performance variations by >20%; mentored engineers to save >10% budgeted spend & unblock progress Business Development: Took initiatives to build & manage 10+ relations with OEMs, universities & start-ups to access their technology & value for the corporate to create new business opportunities; authored statement of work (SOW), co-authored joint development agreements (JDAs) & RFP responses including scope, timeline, budget & resources Financial: Went above & beyond to develop should cost models to define cost reduction, CIP roadmap and enabled marketing team to close commercial negotiations & secure $MM purchase order from contract manufacturer

Arvinder Chadha Ph D PMP's past jobs
Company: Lam Research
Title: Senior Product Engineer, Supply Chain Group
Period: Jul 2014 - Jan 2018 (3 years, 6 months)
Location: Fremont, California

Role: Lead new product introduction (NPI), continuous improvement process development (CIP) & supply chain management for semiconductor wafer fabrication equipments o NPI: Collaborated with cross functional teams to launch 8+ complex electromechanical products to gain & defend market share generating >$100M revenue; ownership of $10M budgeted fixtures installation, qualification, throughput, yield and specification o Supply Chain: Developed suppliers & managed scorecards; managed supply chain escalations by instituting FMEA, quality controls & capacity planning; formalized supplier process of records (POR) & corrective action responses (CARs) o CIP/Cost Reduction: Identified, initiated & spearheaded CIP projects; developed predictive models; delivered >10% annual cost savings, improved yield to achieve <5% scrap, decreased R&D prototype OpEx and turnaround time by ~20% o Project Management: Planned project execution, monitored risks & executed risk responses, implemented necessary changes, delivered status reports to cross functional team; mentored new hires/engineers to increase team productivity

Title: Research Assistant
Period: Aug 2009 - Jun 2014 (4 years, 10 months)

Product: Photodetector, Solar Cell, 3D integrated Silicon photonics, anti-reflection and optical components Role: Design, simulate, fabricate and characterize electro-optical components o Designed and demonstrated first of a kind ultra thin Fano Resonance Enhanced Spectrally Selective Metal Semiconductor Metal (MSM) Infrared (IR) Photodetector and near perfect absorption in graphene monolayer o Designed and demonstrated first of a kind optical waveguide coupler for an out-of-plane surface normal to in-plane vertical coupling for 3d integrated silicon photonics o Developed a theory to design anti-reflection coatings, linear & chiral polarizers across entire optical spectrum o Designed and demonstrated photonic nanomembrane reflector to minimize back surface transmission o Developed variety of table top optical systems using lasers, lamps and variety of optical elements (lenses, splitter, polarizers, etc) for surface normal, angle dependent and vertical to in-plane coupling characterization o Developed transfer printing process to stack ultra thin nanomembranes on flexible/glass substrates. o Developed dry etch process to etch >89 deg sidewall profiles for III-V (InGaAs, GaN) and Silicon based photonics and telecommunication applications o Characterized thin films using spectroscopic ellipsometers, spectrophotometers, and reflectometers o Fabricated variety of electronic and photonic devices in class 100 clean room

Title: Research Associate
Period: Jan 2009 - Sep 2009 (8 months)

o Developed a novel process for fabricating shape memory alloys, polymers, metals and silicon together o Designed circuitry for the embedded electronics to control the movement of an active catheter o Designed the layout and extracted MOS parameters of fabricated embedded electronics

Company: University of Colorado Boulder
Title: Research Assistant
Period: May 2007 - Dec 2008 (1 year, 7 months)

Funding Agency- DARPA Center on Nanoscale Science and Technology for Integrated Micro/Nano-Electromechanical Transducers o Modeled and fabricated RF antenna structures for on-chip wireless communication o Synthesized gold nano shells & silica particles and inverse opals (face centered cubic closed packed silica spheres) via polymer infiltration for photo thermal curing of cancer o Characterized the size and the optical properties of nano shells, spheres and opals

Title: Lead Teaching Assistant
Period: May 2007 - May 2008 (1 year)

Lead Teaching Assistant for the Graduate Teaching Program • Mentor best known methods for effective work practice to new graduate school teaching and research assistants • Doubled the number of representatives of the Electrical Engineering Department in the Graduate School for the improvement of teaching and the preparation and education of graduate students. • Increased the participation of the students in the professional and teaching development workshops through publicity.

Title: Research Assistant
Period: Jan 2007 - May 2008 (1 year, 4 months)

• Fabricated silica opals, inverse opals and gold nanoshells for photonic applications • Characterized the size and the optical properties using SEM and spectrometers

Title: Teaching Assistant,
Period: Jan 2007 - May 2007 (4 months)

Teaching Assistant, Electrical and Computer Engineering Department. • Taught a laboratory course on circuits- circuits involving semi-conductor devices.

Title: Research Intern
Period: Mar 2005 - Mar 2006 (1 year)

Stereo Image Matching at Satellite Platform • Developed software in C++ for feature extraction & matching of stereo images from satellite platform.

Arvinder Chadha Ph D PMP's education
University of California, Berkeley
Engineering Leadership Professional Program
The University of Texas at Arlington
Doctor of Philosophy in Electrical Engineering
2009 - 2014
University of Colorado Boulder
Master of Science in Electrical Engineering
2006 - 2008
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