Azzurra Pulimeno Ph D

Azzurra Pulimeno Ph D is from Bologna Emilia-Romagna Italy. Azzurra is currently FPGA Engineer Technical Leader at Camlin Group. In Azzurra's previous role as a Hardware Design Engineer at Imagination Technologies, Azzurra worked in until Apr 2017. Prior to joining Imagination Technologies, Azzurra was a Postdoctoral Fellow at Politecnico di Torino and held the position of Postdoctoral Fellow. Prior to that, Azzurra was a PhD Student at Politecnico di Torino from Jan 2010 to Apr 2013. Azzurra started working as Visiting PhD Student at Institute of Nanoelectronics at Technische Universität München in Sep 2011. From Jan 2008 to Dec 2009, Azzurra was Tutor (site of Turin, Italy) at CEPU GROUP. Prior to that, Azzurra was a Master Thesis at Politecnico di Torino from Mar 2009 to Nov 2009. Azzurra started working as Internship at STMicroelectronics in May 2006.