David Lau
About
David Lau is from San Francisco Bay Area. David is currently VP, Workload Scaling at OpenAI, located in San Francisco, CA. In David's previous role as a VP Software Engineering at Tesla, David worked in Palo Alto, California until Apr 2025. Prior to joining Tesla, David was a Senior Director of Firmware, Platforms, and Diagnostics at Tesla and held the position of Senior Director of Firmware, Platforms, and Diagnostics at Palo Alto, CA. Prior to that, David was a Director, Firmware Engineering and System Integration at Tesla, based in Palo Alto, CA from Feb 2014 to Nov 2015. David started working as Senior Manager, Firmware Engineering at Tesla in Palo Alto, CA in Oct 2012. From Jan 2010 to Oct 2012, David was Manager, Embedded Processor Engineering at Altera. Prior to that, David was a Supervisor, Embedded IP & Software Engineering at Altera from Mar 2008 to Dec 2009. David started working as Advanced Design Engineer at Altera in Aug 2004.
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David Lau's current jobs
We build the training and inference systems for frontier models at massive scale.
David Lau's past jobs
Vehicle Software: Firmware for the powertrain, traction/stability control, HV electronics, battery management, and body control systems UI software and underlying Embedded Linux platforms Navigation and routing iOS and Android Mobile apps Distributed Systems: Server-side software and infrastructure that provides telemetry, diagnostics, over-the-air updates, and configuration/lifecycle management Data engineering and analytics platforms that power technical and business insights for an increasingly diverse set of customers across the company Diagnostic tools and fleet management Manufacturing and Automation: Automation controls (PLC, robot) Server-side manufacturing execution systems that power all of Tesla’s production operations Product Security and Red Team for software, services, and systems across Tesla
Management and technical leadership of Altera’s next generation of microprocessor and embedded systems solutions. Led RTL development of the ARM System-on-Chip in Altera’s 28nm FPGAs. Led development of a novel multithreaded processor architecture optimized for >40 Gbps packet processing applications.
Expatriate assignment Hired and led a team responsible for development of embedded processors and peripherals, as well as software toolchains, device drivers, and runtime libraries.