Hamid Hameed Butt

Wearables: Compression athletic apparel with EMG sensors & electronics to provide muscle/motion/heart rate activity and feedback/insights to athletes/coaches to enhance human performance and injury prevention/recovery • Built/Lead the talented hardware product development and logistics team from 2 to 20 people + Interns. Responsible for the complete hardware product and functions: Concept, ID, ME, EE, FW, Apparel design, Manufacturing (apparel & electronics), supply chain, and logistics. • Developed an electronic module that collects motion, HR, and EMG data off certain body muscles and sends it to iPhone app or uploads to AWS platform via Hub (WiFi, ethernet, GSM) for data analysis, mining, and viewing • Developed compression apparel (men/women Shorts/Shirts) with EMG sensors and electronics to capture motion, HR, and EMG data. A huge electro-mechanical problem involving/integrating soft goods and electronics to form a reliable, machine wash/dry and durable data gathering compression apparel system. • Worked with SW team to define/develop AWS based backend platform, iOS-based App, and data mining and viewing • During the past ~7 years filed 17 design patents (11 issued & 6 pending) and kept some inventions as company secrets • Set up an intricate supply chain and manufacturing, which encompassed parts/materials/assemblies made in the USA, Europe, China, Taiwan, Korea, and Sri Lanka. • Established the logistics process: shipping, clearing, warehousing, order fulfillment, and handling returns. Worked with USA customs in defining special import/duty category for our products • The product is shipping to Pro/D1 teams, several DoD units, and consumers • Laid foundation (architecture/design/plan) for next gen product dev (Core, Hub, Apparel) using latest BLE, IMU, GPS, WiFi, insulated wires, printed ink technologies, fabrics, etc • Looking into Berry Amendment & TAA Compliance for DoD

Designed and delivered eReader’s for Consumer Market • Responsible for Product Development and Engineering of E-ink and organic TFT plastic display based eReaders for the Russian educational consumer market. Collaborated with our research group in Cambridge and Fab in Germany. • Rebuilt the HW, SW, QA groups. Hired 18 people and contracted with ID and ME design house and developed the Android based WiFi enabled plastic display based eReader. New ID/ME/HW/FW/SW design in 7 months. • Completed WinCE based Plastic eReader with reading applications and delivered units to Russian education market. • Set up high volume e-Reader manufacturing at Flextronics in Poland for deliveries to Russia

• Responsible for delivering high volume educational consumer Leapfrog products from Concept/Design to Production: Educational Toys, Optical Reading Devices, and Handheld and TV Gaming devices/products. • Responsible for all Engineering functions – Architecture, Systems, Mechanical, Electrical, ASICs, Firmware, Advance Concepts, DFM, Production Test, and Component Selection/Qual. Engineering groups in Emeryville, Santa Clara, Hong Kong, & Shenzhen. Close relationships with supply chain management and manufacturing in China and Taiwan • Successfully delivered more than 60 high volume consumer products: including optical reading Products (Tag, Tag Jr), handheld gaming Products (Leapster II, Didj, Explorer line), TV based gaming, and educational Toys. • Diverse use of HW/SW technologies: 8-bit micro controllers to complex ARM/ARC based SOC’s. Simple control flow in toys, MQX RTOS in optical reading devices, to Linux in handheld gaming devices. • Responsible for defining and delivering all embedded device firmware, O/S, drivers, app manager, audio/video codecs, Flash Lite 3.1, all API’s (camera, audio, video…) and SDK for game, content, and app developers. • Architected Linux based gaming HW/FW/SW platform using custom designed LF-1000 (ARM926 3D graphics) SoC in 90nm, developed Linux platform, and delivered multiple handheld gaming products • Developed two additional ASICs: One consolidating power and audio chips. Second LF-2000 65nm 600 MHz ARM Cortex A9 SOC with 2D/3D graphics for Linux based gaming handheld devices and kid tablets. • Developed 5”/7” WiFi tablet platform which redefined reading, learning, and communication experience for kids

Storage, Security, and Networking ASICs and Solutions • Responsible for developing and delivering semiconductor solutions for secure networking, IP packet processing, Network Processors, Compression and Security ICs, Ref. designs, and software/SDK’s. • Developed Multi-core (compression, encryption, authentication) 3Gbps security processor in .13μ Toshiba. Complete with reference board, embedded protocol support software, and SDK. • Developed/released several security acceleration production boards based on Hifn compression, encryption, authentication ICs, and software for VPN/Firewall appliances, routers, and wireless switches. • Developed 4 Gbps network processor (203 mm2 .11μ IBM). With 500MHz 16 pico-processors and 440ex PowerPC. Designed reference router platform/product. Provided SW development tools and production release system software for Ethernet L2/L3 switch/router applications.

• Help developed revenues to $450M in 3 years by delivering products in Broadband Access, Security, Wireless (802.11 & Bluetooth), and Connectivity (USB &1394) areas. • As GM of Broadband Access built $55+M business line delivering router and modem IC/solutions for Cable/ DSL/Ethernet, and provided Cryptography/Security IC’s & Software for secure internet traffic. • Lead and administered a global organization of 300+ people (in US, Europe, India). • Developed and offered highly integrated SoC solutions (ICs, production ready reference designs and Linux based software) for broadband 802.11a/g wireless routers for data, voice, video applications for Cable, DSL, and Ethernet markets. SoC’s were designed using MIPS & DSP cores in 0.180.12 Philips/TSMC processes. • First to deliver an integrated wireless (802.11b/g) Ethernet Data/Security (VPN/Firewall) Broad Band Router with POTS, DECT, and Bluetooth based VoIP. The PTD-2754 was awarded 2003 Product of the year award by European Cable, Satellite & Mediacast International.

Developed a business plan and established a new product line for data, voice, and video over IP cable business. Responsible for P&L and all aspects of business, marketing, engineering, logistics, and operations. Grew business from $3M in 1999 to $40+M in 2000, with increased profit margins. Developed integrated cable modem and VoIP SoC’s based upon DOCSIS 1.0/1.1 and Packet Cable standards (designed in Philips/TSMC .25μ/.12μ processes). Developed complete wired/wireless cable networking solutions with reference boards, pSOS and Linux based system software, DOCSIS MAC software, bus drivers, SDK's, audio DSP G.xx functions, communication stacks, firmware, and VoIP application software. Managed projects with development groups based in US & Europe.

Help build $20+M/Yr business for digital media in satellite and cable set top boxes for channel and source decoding. Responsible for and led the development of channel and source decoding SoC IC’s , board/system, and software. Groups were based in US, Holland, and France. The STB source decoder SoC’s (integrated MIPS CPU, descrambler/demultiplexer and peripherals) were designed in Philips .35/.25process and the STB software was based on pSOS complete with drivers and SDK. Project/Development Manager for 2D/3D Video Graphics Controllers (VGC) for PC, STB, and Digital TV markets. In 10 months staffed design group, built the verification strategy/team, set up technology and physical design groups, established hierarchical physical design/verification methodology/tools and produced two IC’s 9725 (2D VGC) and 9727 (3D) in 0.35 TSMC process that were 1st pass silicon successes and were shown at Comdex 97

• Responsible for pre-silicon verification, emulation using Quickturn system, and software development for Multimedia ICs, MPEG2 cores, and embedded MIPS cores. Project managed joint USA/Japanese developments. • Provided O/S (C Executive, Linux), application software for MIPS cores, software libraries, and system level diagnostics. • Awarded Toshiba’s 1996 Core Value award for work in MPEG2 design and verification.

• Developed ASIC design methodology, established system simulation, and CAE programs to develop custom ASICs for Compaq portables and desktops • Established Verilog HDL and Synopsys synthesis-based ASIC design methodology at Compaq • Provided services for ASIC design verification, emulation, DFT, signal integrity, and system simulations for Compaq ASICs • Successfully managed multi-million dollar expense and capital budgets