Michael Anfang

🥚 Eggslist – Decentralized, Community-Owned Local Food Platform 🔹 Founder & Product Lead – Built a platform connecting people with local food growers and small-scale producers 🔹 UX & Technical Leadership – Led a distributed team of engineers and designers to bring the platform from concept to market 🔹 Passion-Driven Project – Focused on food accessibility, mutual aid, and decentralization 🐔 Hatchtrack – IoT for Poultry Management 🔹 Smart Egg Incubation – Designed an IoT-powered system to track incubation conditions and improve hatch rates 🔹 Hardware & Software Development – Built a device ecosystem for backyard poultry keepers, integrating cloud-based monitoring 🔹 Startup Acceleration – Supported by MassChallenge and awarded equity-free grants through the IDEA program at NU Across all my ventures, my focus remains the same: building UX friendly and innovative engineering solutions to solve meaningful problems.

Founder | Roaring Rooster | AI-Powered FPGA Engineering & Consulting At Roaring Rooster, I specialize in FPGA development augmented by AI, combining deep hardware expertise with modern AI-assisted workflows to accelerate design, verification, and optimization. I work from an ever-expanding collection of common modules included in many project, and customize rules and workflow per-project to great speed development and release time. 🔹 AI-Assisted FPGA Design & Consulting – Leveraging AI tools to automate repetitive tasks, streamline development, and reduce engineering bottlenecks 🔹 Custom HDL Development – Verilog, VHDL, SystemVerilog for high-performance FPGA solutions 🔹 DSP & IP Integration – Implementing signal processing algorithms and integrating AXI/custom IP for complex designs 🔹 Clock & Timing Optimization – High-speed designs with multiple clock domains, crossing solutions, and reset strategies 🔹 Testing & Simulation – AI-driven testbench automation, verification strategies, and real-world debugging 🔹 Vendor-Agnostic Expertise – Xilinx, Intel (Altera), and open-source FPGA toolchains We integrate AI not to replace engineering expertise, but to amplify it—reducing development cycles, improving test coverage, and freeing engineers to focus on innovation. 🚀 Helping startups and hardware teams accelerate FPGA development with AI-powered workflows.

Contracted with PsiQuantum to build a from-scratch Artix-7 FPGA to facilitate communication for quantum computing controls. Worked to architect and implement a system including multiple SERDES links, register control and access over SPI, chip to chip communication over transceiver links, and parsed message data to send and receive commands.

FPGA consulting on wireless telecom projects. Rework, debug, and simulation on proprietary IP cores related to radio processing. High speed designs on Intel parts. Multiple simultaneous IQ streams packaged as DIFI, processed through a variety of user-selectable modules.

Partnered with Qubitekk for the exciting launch of an industry first - a commercial quantum network, in partnership with EPB in Chattanooa, TN. I work on FPGA designs on Cyclone 10GX and Stratix 10TX systems, designing NIOS software, along with with hardware design reviews and debug to enable Qubitekk to establish its name as a leader in in the quantum industry. We communicate between several FPGA-based modules to establish latency-accurate connections to detect photon entanglement.

Continued work with Facebook Reality Labs during COVID19 pandemic, Developing FPGA based prototype solutions for AR/VR applications to enable multiple in-house customers to benefit from a rapid prototyping platform for AR/VR rendering. Implemented complex AXI interconnects, latency-sensitive AR/VR IP for GPU rendering to VR displays, and implemented multiple variants of prototype blocks on predominantly Virtex Ultrascale platforms.

FPGA design for Tethers Unlimited, Inc., focused on flight ready products for satellite and space applications. Product lines include the SWIFT flight-ready software defined radios and Cobra robotic gimbals. Next up, chickens in space!

Working with a research group to implementing FPGA-based prototyping solutions for next-gen Virtual and Augmented Reality applications. Implemented NOCs, latency-sensitive AR/VR IP for GPU rendering to VR displays, and implemented multiple variants of prototype blocks on predominantly Virtex Ultrascale platforms.

Continued FPGA feature development and improvements on Epiq's lineup of Sidekiq SDRs Porting SDR reference design to custom hardware on Zynq platforms

Teamed with Epiq bring to market the smallest of modular, custom software defined radios, in mPCIe and M.2 form factors. Epiq had single-digit employees when I joined, and has since scaled to ~50 as they supported clients in telecom and defense. I performed FPGA design and validation on Sidekiq, Matchstiq, Maveriq, and Quadratiq lines of software defined radios, working a highly skilled team of RF and software engineers. System Integration High speeed IO DDR / SERDES PCIe / 10GBe / GBe Off-chip interfaces (SPI, I2C, USB) Clock rates up to 240MHz Xilinx Spartan 6 - Xilinx 7 Series - Zynq