JB

John Burkhert

Sr. PCB Layout Engineer at GoPro | Story Teller for Cadence
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LinkedIn: John Burkhert
Location: 美国 加利福尼亚州 桑尼维尔
Current employer: GoPro
Current title:
Sr. PCB Layout Engineer
Last updated: 22/05/2023 00:20 AM
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About

John Burkhert is from 美国 加利福尼亚州 桑尼维尔. John works in the following industries: "电信", "计算机软件", "半导体", "互联网", "消费类电子产品", "电器/电子制造", and "无线通讯". John is currently Sr. PCB Layout Engineer at GoPro, located in San Mateo, California, United States. John also works as Story Teller @ Cadence Design Systems at Cadence Design Systems, a job John has held since May 2018. In John's previous role as a Sr. PCB Designer at Microsoft, John worked in San Francisco Bay Area until Jun 2020. Prior to joining Microsoft, John was a Principal PCB Designer at Velodyne Lidar, Inc. and held the position of Principal PCB Designer at San Francisco Bay Area. Prior to that, John was a Sr. PCB Designer at Google, based in San Francisco Bay Area from Apr 2013 to Sep 2017. John started working as PWB Designer, Staff at Qualcomm Atheros in San Jose in Dec 2006. From Jun 2005 to Dec 2006, John was Senior PCB Designer at Airgo Networks, based in Palo Alto, CA. Prior to that, John was a Sr. Layout Engineer at Big Bear Networks, based in Sunnyvale from Aug 2001 to Jun 2005.

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John Burkhert's current jobs
Company: GoPro
Title: Sr. PCB Layout Engineer
Period: Oct 2020 - Present (5 years, 2 months)
Location: San Mateo, California, United States

You know what GoPro does and you know what I do; in particular, designing the PCBs that support rugged action cameras. Of course it's another shop using Cadence tools. I'm also using the Hero 9 daily to find out how we can do it better just in case there is a number higher than 9 in the works.

Title: Story Teller @ Cadence Design Systems
Period: May 2018 - Present (7 years, 7 months)
Location: Around the world in 80 miliseconds

What I do is take a dry and boring subject and bring it to life with my experience and passion for CAD PCB Layout. The topics are generally chosen by my followers who count on my to share knowledge and give meaning to the art of design. In addition, selected stories are syndicated in Printed Circuit Design and Fabrication Magazine each month. https://resources.orcad.com/authors/john-burkhert https://www.pcdandf.com/pcdesign/index.php/current-issue/241-designer-s-notebook https://resources.ema-eda.com/authors/john-burkhert

John Burkhert's past jobs
Company: Microsoft
Title: Sr. PCB Designer
Period: Aug 2019 - Jun 2020 (10 months)
Location: San Francisco Bay Area

CAD PCB Layout of rigid, rigid/flex and flex circuits for wearable augmented reality headsets (Hololens). * This is a contract with a fast-paced development team using Cadence Allegro version 17.4 and, of course, the complete suite of Microsoft applications. * Team design in a highly collaborative environment with many contributors while using outside vendors after hours. * Learning something new almost every day though I'm not at liberty to discuss the details.

Company: Velodyne Lidar, Inc.
Title: Principal PCB Designer
Period: Aug 2017 - Aug 2019 (2 years)
Location: San Francisco Bay Area

CAD PCB Layout of futuristic devices supporting cutting edge technology in a Silicon Valley factory. * 6-14 Layer through-hole boards for VLP64 and VLS128 Lidar sensors using Allegro 17.2 and OrCAD. * Constraint management of critical routing features like length-matching and impedance control. * Flex circuits including automotive Ethernet connectivity. * Discrete Laser and Detector circuits that drive new levels of manufacturing; Lasers making Lasers.

Company: Google
Title: Sr. PCB Designer
Period: Apr 2013 - Sep 2017 (4 years, 5 months)
Location: San Francisco Bay Area

CAD PCB Layout using state of the art tools for a series of different hardware projects. * High density interconnect (HDI) boards for numerous MCUs and SOCs using Allegro 16.6 - 17.2 * Flexible circuits using typical ZIF connectors, usually 2 layers but also an interesting USB C type flex and a few rigid/flex designs. * Working with a chip team on a series of what-if scenarios regarding different device footprints and ball maps. The deliverables were the minimum stack-up and pertinent features.

Company: Qualcomm Atheros
Title: PWB Designer, Staff
Period: Dec 2006 - Mar 2013 (6 years, 3 months)
Location: San Jose

CAD PCB layout in support of various chip teams including GPS, WIFI, Bluetooth, NFC, etc. * Training Pads and Mentor users to run Cadence Allegro version 16.5 * Working with engineers around the Pacific rim while leveraging the time shift * Learning how to work in a large organization with thousands of coworkers

Company: Airgo Networks
Title: Senior PCB Designer
Period: Jun 2005 - Dec 2006 (1 year, 6 months)
Location: Palo Alto, CA

CAD PCB layout supporting MIMO radio chipsets in an "energetic" start-up that helped form the 802.11n specification * Worked closely with Mechanical Engineering to develop products for USB, Mini-card, Half mini-card and PCIe form factors * Continued with this team as it was acquired by Qualcomm inc.

Company: Big Bear Networks
Title: Sr. Layout Engineer
Period: Aug 2001 - Jun 2005 (3 years, 10 months)
Location: Sunnyvale

* PCB and substrate layout using Cadence Allegro and Advanced Package Designer (APD) * Designed optical transponders for OC192 (10 Gb/s) and OC768 (40 Gb/s) * Managed fabrication vendors, P.O.s and delivery schedules * Supervised PCB layout consultants during peak periods * Learned to layout LTCC and thin film substrates and HDI boards * Extensive travel and a lot of self directed work

John Burkhert's education
Mission College
2010 - 2012
John Burkhert's top skills
Wireless Technologies CDMA SoC Code Division Multiple Access Method (CDMA) Radio Frequency (RF) UMTS Wireless PCB Design PCB design Embedded Systems Allegro GSM Mobile Devices Mobile Applications RF Telecommunications LTE Electronics WCDMA Printed Circuit Board (PCB) Design
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There are 2 other "John Burkhert". You can find all of them in FinalScout.
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